Semiconductor packages are used in a wide variety of products. In addition, according to the recent trend toward slim, light, and compact products, in order to reduce the size of the semiconductor package, growing attention is being paid to a flip chip package having bumps directly formed on a surface of a semiconductor die or a TSV package having a through silicon via (TSV) formed in a bond pad of a semiconductor die and a solder bump formed in the TSV.
In general, the flip chip package or the TSV package includes a redistribution layer (RDL) connected to a bond pad of a semiconductor die and redistributing portions to be connected to the bumps, and an under bump metal (UBM) connected to the RDL to increase a binding force with the solder bump.
Designing a redistribution layer (RDL) is an important process in manufacturing a semiconductor package. Since the implementation of the RDL is performed in a very small area, patterning becomes complicated and a great deal of time is required in designing the RDL.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present disclosure as set forth in the remainder of the present application with reference to the drawings.